/*
 * Copyright 2014 Freescale Semiconductor, Inc.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

static const u8 int_routing_conf[] = {
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* DMA0 Transfer Complete CH0-31 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* DMA0 Error Interrupt CH0-31 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* DMA1 Transfer Complete CH0-31 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* DMA1 Transfer Complete CH0-31 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* MSCM-ECC0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* MSCM-ECC1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* CSU Alarm */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* MSCM-ACTZS */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* WDOG-A5 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* WDOG-M4 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* WDOG-SNVS */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* CP1 Boot Fail */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* QSPI0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* QSPI1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*DDRMC */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SDHC0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SDHC1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*DCU0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*DCU1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*VIU */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*RLE */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SEG LCD*/
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*PIT */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*LPTimer 0*/
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexTimer 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexTimer 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexTimer 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexTimer 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ANADIG - USB PHY 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ANADIG - USB PHY 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ADC 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ADC 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*DAC 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*DAC 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexCAN 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*FlexCAN 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 4 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*UART 5 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SPI 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SPI 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SPI 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*SPI 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*I2C 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*I2C 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*I2C 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*I2C 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*USBC 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*USBC 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ENET 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ENET 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*1588 Timer 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*1588 Timer 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*ENET Switch */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/*NFC */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SAI 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SAI 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SAI 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SAI 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* ESAI BIFIFO */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SPDIF */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* ASRC */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* VREG - HVD Interrupt */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* WKUP 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* CCM - FXOSC Ready */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* CCM - PLLs */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* SRC */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* PDB */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* EWM */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* GPIO 0 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* GPIO 1 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* GPIO 2 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* GPIO 3 */
	MSCM_IRSPRC_ROUTE_TO_CA5,	/* GPIO 4 */
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
	MSCM_IRSPRC_ROUTE_TO_CA5,
};
